A SURVEY ON A HIGH SPEED BINARY FLOATING POINT MULTIPLIER USING DADDA ALGORITHM IN FPGA. International Journal of Engineering Sciences & Management Research, [S. l.], v. 4, n. 3, p. 89–92, 2017. Disponível em: https://ijesmr.com/index.php/ijesmr/article/view/364. Acesso em: 4 feb. 2026.