A REVIEW ON ADVANCED ENCRYPTION STANDARD (AES) ALGORITHM ON FPGA

Authors

  • Ku Sankalpa N. Moharir1 Author

Keywords:

AES, FPGA, VHDL, Encryption, Decryption, Cryptography.

Abstract

A high speed security algorithm is always necessary and important for wired/wireless communication. The symmetric block cipher plays a major role in the bulk data encryption. One of the best existing symmetric security algorithms to provide data security is advanced encryption standard (AES). AES has the advantage of being implemented in both hardware and software. Hardware implementation of the AES has lot of advantage such has increased throughput and better security level. Hardware Implementation for generalized AES (Advanced Encryption Standard) encryption and Decryption has been made using VHDL

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Published

2015-05-30

Issue

Section

Articles

How to Cite

A REVIEW ON ADVANCED ENCRYPTION STANDARD (AES) ALGORITHM ON FPGA. (2015). International Journal OF Engineering Sciences & Management Research, 2(5), 26-29. https://ijesmr.com/index.php/ijesmr/article/view/57